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[/] [ethmac/] [tags/] [rel_24/] [rtl/] - Rev 277

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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7263d 19h /ethmac/tags/rel_24/rtl/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7263d 19h /ethmac/tags/rel_24/rtl/
238 Defines fixed to use generic RAM by default. mohor 7275d 23h /ethmac/tags/rel_24/rtl/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7278d 04h /ethmac/tags/rel_24/rtl/
232 fpga define added. mohor 7283d 22h /ethmac/tags/rel_24/rtl/
229 case changed to casex. mohor 7289d 20h /ethmac/tags/rel_24/rtl/
227 Changed BIST scan signals. tadejm 7290d 00h /ethmac/tags/rel_24/rtl/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7290d 02h /ethmac/tags/rel_24/rtl/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7294d 01h /ethmac/tags/rel_24/rtl/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7297d 02h /ethmac/tags/rel_24/rtl/

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