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[/] [ethmac/] [tags/] [rel_24/] [rtl/] - Rev 338

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Rev Log message Author Age Path
338 root 3984d 15h /ethmac/tags/rel_24/rtl/
335 New directory structure. root 4041d 20h /ethmac/tags/rel_24/rtl/
307 This commit was manufactured by cvs2svn to create tag 'rel_24'. 5963d 15h /ethmac/tags/rel_24/rtl/
306 Lapsus fixed (!we -> ~we). simons 5963d 15h /ethmac/tags/rel_24/rtl/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 5985d 11h /ethmac/tags/rel_24/rtl/
302 mbist signals updated according to newest convention markom 6011d 22h /ethmac/tags/rel_24/rtl/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 6022d 14h /ethmac/tags/rel_24/rtl/
297 Artisan ram instance added. simons 6075d 13h /ethmac/tags/rel_24/rtl/
288 This file was not part of the RTL before, but it should be here. simons 6111d 15h /ethmac/tags/rel_24/rtl/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 6137d 18h /ethmac/tags/rel_24/rtl/
285 Binary operator used instead of unary (xnor). mohor 6137d 18h /ethmac/tags/rel_24/rtl/
284 Busy was set 2 cycles too late. Reported by Dennis Scott. mohor 6165d 20h /ethmac/tags/rel_24/rtl/
283 RxBDAddress was updated also when value to r_TxBDNum was written with
greater value than allowed.
mohor 6193d 13h /ethmac/tags/rel_24/rtl/
280 Reset has priority in some flipflops. mohor 6271d 15h /ethmac/tags/rel_24/rtl/
278 A new bug (entered with previous update) fixed. When abort occured sometimes
data transmission was blocked.
mohor 6271d 16h /ethmac/tags/rel_24/rtl/
277 When padding was enabled and crc disabled, frame was not ended correctly. mohor 6271d 16h /ethmac/tags/rel_24/rtl/
276 Defer indication changed. tadejm 6271d 16h /ethmac/tags/rel_24/rtl/
275 Fix MTxErr or prevent sending too big frames. mohor 6278d 21h /ethmac/tags/rel_24/rtl/
272 When control packets were received, they were ignored in some cases. tadejm 6279d 16h /ethmac/tags/rel_24/rtl/
270 When receiving normal data frame and RxFlow control was switched on, RXB
interrupt was not set.
mohor 6280d 18h /ethmac/tags/rel_24/rtl/
269 When in full duplex, transmit was sometimes blocked. Fixed. mohor 6281d 18h /ethmac/tags/rel_24/rtl/
264 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.
mohor 6340d 16h /ethmac/tags/rel_24/rtl/
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.
mohor 6341d 04h /ethmac/tags/rel_24/rtl/
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).
mohor 6342d 05h /ethmac/tags/rel_24/rtl/
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 6342d 06h /ethmac/tags/rel_24/rtl/
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 6342d 06h /ethmac/tags/rel_24/rtl/
255 TPauseRq synchronized to tx_clk. mohor 6342d 06h /ethmac/tags/rel_24/rtl/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 6343d 12h /ethmac/tags/rel_24/rtl/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 6343d 12h /ethmac/tags/rel_24/rtl/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6343d 12h /ethmac/tags/rel_24/rtl/

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