OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_25/] - Rev 136

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
136 Parameter ResetValue changed to capital letters. mohor 8147d 06h /ethmac/tags/rel_25
135 New revision. External DMA removed, TX_BD_NUM changed. mohor 8148d 22h /ethmac/tags/rel_25
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.
mohor 8148d 23h /ethmac/tags/rel_25
133 - Busy signal was not set on time when scan status operation was performed
and clock was divided with more than 2.
- Nvalid remains valid two more clocks (was previously cleared too soon).
mohor 8149d 00h /ethmac/tags/rel_25
132 LinkFailRegister is reflecting the status of the PHY's link fail status bit. mohor 8149d 00h /ethmac/tags/rel_25
131 LinkFail signal was not latching appropriate bit. mohor 8149d 00h /ethmac/tags/rel_25
130 First draft of the Ethernet design document. Not a finished version. Still many
things missing.
mohor 8149d 01h /ethmac/tags/rel_25
129 Traffic cop with 2 wishbone master interfaces and 2 wishbona slave
interfaces:
- Host connects to the master interface
- Ethernet master (DMA) connects to the second master interface
- Memory interface connects to the slave interface
- Ethernet slave interface (access to registers and BDs) connects to second
slave interface
mohor 8149d 01h /ethmac/tags/rel_25
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.
mohor 8169d 00h /ethmac/tags/rel_25
126 InvalidSymbol generation changed. mohor 8169d 00h /ethmac/tags/rel_25
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.
mohor 8169d 00h /ethmac/tags/rel_25
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 8169d 01h /ethmac/tags/rel_25
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 8171d 02h /ethmac/tags/rel_25
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 8171d 02h /ethmac/tags/rel_25
120 Unused files removed. mohor 8171d 03h /ethmac/tags/rel_25
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8171d 03h /ethmac/tags/rel_25
118 ShiftEnded synchronization changed. mohor 8174d 18h /ethmac/tags/rel_25
117 Clock mrx_clk set to 2.5 MHz. mohor 8175d 05h /ethmac/tags/rel_25
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 8175d 05h /ethmac/tags/rel_25
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8176d 02h /ethmac/tags/rel_25

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.