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[/] [ethmac/] [tags/] [rel_25/] - Rev 89

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Rev Log message Author Age Path
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8070d 13h /ethmac/tags/rel_25/
88 rx_fifo was not always cleared ok. Fixed. mohor 8076d 12h /ethmac/tags/rel_25/
87 Status was not latched correctly sometimes. Fixed. mohor 8076d 14h /ethmac/tags/rel_25/
86 Big Endian problem when sending frames fixed. mohor 8077d 21h /ethmac/tags/rel_25/
85 Log info was missing. mohor 8083d 07h /ethmac/tags/rel_25/
84 LinkFail signal was not latching appropriate bit. mohor 8083d 07h /ethmac/tags/rel_25/
83 MAC address recognition was not correct (bytes swaped). mohor 8083d 07h /ethmac/tags/rel_25/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8083d 09h /ethmac/tags/rel_25/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8083d 09h /ethmac/tags/rel_25/
80 Small fixes for external/internal DMA missmatches. mohor 8087d 11h /ethmac/tags/rel_25/
79 RetryCntLatched was unused and removed from design mohor 8087d 11h /ethmac/tags/rel_25/
78 WB_SEL_I was unused and removed from design mohor 8087d 11h /ethmac/tags/rel_25/
77 Interrupts changed mohor 8087d 12h /ethmac/tags/rel_25/
76 Interrupts changed in the top file mohor 8087d 12h /ethmac/tags/rel_25/
75 r_Bro is used for accepting/denying frames mohor 8087d 12h /ethmac/tags/rel_25/
74 Reset values are passed to registers through parameters mohor 8087d 12h /ethmac/tags/rel_25/
73 Number of interrupts changed mohor 8087d 12h /ethmac/tags/rel_25/
72 Retry is not activated when a Tx Underrun occured mohor 8091d 15h /ethmac/tags/rel_25/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8095d 16h /ethmac/tags/rel_25/
70 Small fixes. mohor 8095d 17h /ethmac/tags/rel_25/

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