OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_26/] - Rev 243

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
243 Late collision is not reported any more. tadejm 7827d 09h /ethmac/tags/rel_26/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7827d 23h /ethmac/tags/rel_26/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7827d 23h /ethmac/tags/rel_26/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7827d 23h /ethmac/tags/rel_26/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7828d 00h /ethmac/tags/rel_26/
238 Defines fixed to use generic RAM by default. mohor 7840d 04h /ethmac/tags/rel_26/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7842d 09h /ethmac/tags/rel_26/
235 rev 4. mohor 7843d 00h /ethmac/tags/rel_26/
234 Figure list assed to the revision 3. mohor 7843d 08h /ethmac/tags/rel_26/
233 Revision 0.3 released. Some figures added. mohor 7843d 08h /ethmac/tags/rel_26/
232 fpga define added. mohor 7848d 03h /ethmac/tags/rel_26/
231 Description of Core Modules added (figure). mohor 7850d 04h /ethmac/tags/rel_26/
229 case changed to casex. mohor 7854d 01h /ethmac/tags/rel_26/
227 Changed BIST scan signals. tadejm 7854d 05h /ethmac/tags/rel_26/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7854d 06h /ethmac/tags/rel_26/
225 Some minor changes. tadejm 7854d 06h /ethmac/tags/rel_26/
224 Signals for a wave window in Modelsim. tadejm 7854d 08h /ethmac/tags/rel_26/
223 Some code changed due to bug fixes. tadejm 7854d 08h /ethmac/tags/rel_26/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7858d 06h /ethmac/tags/rel_26/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7861d 06h /ethmac/tags/rel_26/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.