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Rev Log message Author Age Path
338 root 4154d 15h /ethmac/tags/rel_26/
335 New directory structure. root 4211d 20h /ethmac/tags/rel_26/
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 5989d 15h /ethmac/tags/rel_26/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 5989d 15h /ethmac/tags/rel_26/
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 5989d 18h /ethmac/tags/rel_26/
319 Latest Ethernet IP core testbench. tadejm 6020d 14h /ethmac/tags/rel_26/
318 Latest Ethernet IP core testbench. tadejm 6020d 14h /ethmac/tags/rel_26/
317 Multicast detection fixed. Only the LSB of the first byte is checked. igorm 6029d 21h /ethmac/tags/rel_26/
315 Updated testbench. Some more testcases, some repaired. tadejm 6132d 17h /ethmac/tags/rel_26/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 6132d 17h /ethmac/tags/rel_26/
311 Update script for running different file list files for different RAM models. tadejm 6132d 17h /ethmac/tags/rel_26/
310 More signals. tadejm 6132d 17h /ethmac/tags/rel_26/
309 Update file list files for different RAM models with byte select accessing. tadejm 6132d 17h /ethmac/tags/rel_26/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 6132d 18h /ethmac/tags/rel_26/
306 Lapsus fixed (!we -> ~we). simons 6133d 15h /ethmac/tags/rel_26/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 6155d 12h /ethmac/tags/rel_26/
302 mbist signals updated according to newest convention markom 6181d 22h /ethmac/tags/rel_26/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 6192d 14h /ethmac/tags/rel_26/
299 Artisan RAMs added. mohor 6239d 18h /ethmac/tags/rel_26/
297 Artisan ram instance added. simons 6245d 13h /ethmac/tags/rel_26/
295 Few minor changes. tadejm 6246d 16h /ethmac/tags/rel_26/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 6248d 17h /ethmac/tags/rel_26/
293 initial. tadejm 6272d 14h /ethmac/tags/rel_26/
292 Corrected mistake. tadejm 6272d 14h /ethmac/tags/rel_26/
291 initial tadejm 6272d 15h /ethmac/tags/rel_26/
290 Additional checking for FAILED tests added - for ATS. tadejm 6272d 16h /ethmac/tags/rel_26/
288 This file was not part of the RTL before, but it should be here. simons 6281d 15h /ethmac/tags/rel_26/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 6307d 18h /ethmac/tags/rel_26/
285 Binary operator used instead of unary (xnor). mohor 6307d 19h /ethmac/tags/rel_26/
284 Busy was set 2 cycles too late. Reported by Dennis Scott. mohor 6335d 20h /ethmac/tags/rel_26/

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