OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_27/] - Rev 311

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
311 Update script for running different file list files for different RAM models. tadejm 7441d 01h /ethmac/tags/rel_27/
310 More signals. tadejm 7441d 01h /ethmac/tags/rel_27/
309 Update file list files for different RAM models with byte select accessing. tadejm 7441d 01h /ethmac/tags/rel_27/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 7441d 01h /ethmac/tags/rel_27/
306 Lapsus fixed (!we -> ~we). simons 7441d 23h /ethmac/tags/rel_27/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7463d 19h /ethmac/tags/rel_27/
302 mbist signals updated according to newest convention markom 7490d 06h /ethmac/tags/rel_27/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 7500d 22h /ethmac/tags/rel_27/
299 Artisan RAMs added. mohor 7548d 02h /ethmac/tags/rel_27/
297 Artisan ram instance added. simons 7553d 21h /ethmac/tags/rel_27/
295 Few minor changes. tadejm 7555d 00h /ethmac/tags/rel_27/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 7557d 00h /ethmac/tags/rel_27/
293 initial. tadejm 7580d 22h /ethmac/tags/rel_27/
292 Corrected mistake. tadejm 7580d 22h /ethmac/tags/rel_27/
291 initial tadejm 7580d 23h /ethmac/tags/rel_27/
290 Additional checking for FAILED tests added - for ATS. tadejm 7581d 00h /ethmac/tags/rel_27/
288 This file was not part of the RTL before, but it should be here. simons 7589d 23h /ethmac/tags/rel_27/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.		 mohor 7616d 02h /ethmac/tags/rel_27/
285 Binary operator used instead of unary (xnor). mohor 7616d 02h /ethmac/tags/rel_27/
284 Busy was set 2 cycles too late. Reported by Dennis Scott. mohor 7644d 04h /ethmac/tags/rel_27/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.