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[/] [ethmac/] [tags/] [rel_27/] [bench/] [verilog/] - Rev 279

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Rev Log message Author Age Path
279 Underrun test fixed. Many other tests fixed. mohor 6158d 13h /ethmac/tags/rel_27/bench/verilog/
274 Backup version. Not fully working. tadejm 6166d 07h /ethmac/tags/rel_27/bench/verilog/
267 Full duplex control frames tested. mohor 6222d 10h /ethmac/tags/rel_27/bench/verilog/
266 Flow control test almost finished. mohor 6227d 09h /ethmac/tags/rel_27/bench/verilog/
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.
mohor 6228d 00h /ethmac/tags/rel_27/bench/verilog/
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.
mohor 6228d 12h /ethmac/tags/rel_27/bench/verilog/
254 Temp version. mohor 6230d 06h /ethmac/tags/rel_27/bench/verilog/
252 Just some updates. tadejm 6230d 09h /ethmac/tags/rel_27/bench/verilog/
243 Late collision is not reported any more. tadejm 6235d 13h /ethmac/tags/rel_27/bench/verilog/
227 Changed BIST scan signals. tadejm 6262d 09h /ethmac/tags/rel_27/bench/verilog/
223 Some code changed due to bug fixes. tadejm 6262d 12h /ethmac/tags/rel_27/bench/verilog/
216 Bist signals added. mohor 6269d 13h /ethmac/tags/rel_27/bench/verilog/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 6271d 13h /ethmac/tags/rel_27/bench/verilog/
194 Full duplex tests modified and testbench bug repaired. tadej 6290d 12h /ethmac/tags/rel_27/bench/verilog/
192 Some additional reports added tadej 6292d 08h /ethmac/tags/rel_27/bench/verilog/
191 Bug repaired in eth_phy device tadej 6292d 08h /ethmac/tags/rel_27/bench/verilog/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 6292d 10h /ethmac/tags/rel_27/bench/verilog/
188 PHY changed. tadej 6293d 06h /ethmac/tags/rel_27/bench/verilog/
182 Full duplex test improved. tadej 6294d 08h /ethmac/tags/rel_27/bench/verilog/
181 MIIM test look better. mohor 6294d 11h /ethmac/tags/rel_27/bench/verilog/

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