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[/] [ethmac/] [tags/] [rel_27/] [rtl/] - Rev 320

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Rev	Log message	Author	Age	Path
320	TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.	igorm	7295d 08h	/ethmac/tags/rel_27/rtl/
317	Multicast detection fixed. Only the LSB of the first byte is checked.	igorm	7335d 10h	/ethmac/tags/rel_27/rtl/
312	Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16.	tadejm	7438d 07h	/ethmac/tags/rel_27/rtl/
306	Lapsus fixed (!we -> ~we).	simons	7439d 04h	/ethmac/tags/rel_27/rtl/
304	WISHBONE slave changed and tested from only 32-bit accesss to byte access.	tadejm	7461d 01h	/ethmac/tags/rel_27/rtl/
302	mbist signals updated according to newest convention	markom	7487d 12h	/ethmac/tags/rel_27/rtl/
301	Update RxEnSync only when mrxdv_pad_i is inactive (LOW).	knguyen	7498d 04h	/ethmac/tags/rel_27/rtl/
297	Artisan ram instance added.	simons	7551d 03h	/ethmac/tags/rel_27/rtl/
288	This file was not part of the RTL before, but it should be here.	simons	7587d 04h	/ethmac/tags/rel_27/rtl/
286	Define file in eth_cop.v is changed to eth_defines.v. Some defines were moved from tb_eth_defines.v to eth_defines.v.	mohor	7613d 07h	/ethmac/tags/rel_27/rtl/
285	Binary operator used instead of unary (xnor).	mohor	7613d 08h	/ethmac/tags/rel_27/rtl/
284	Busy was set 2 cycles too late. Reported by Dennis Scott.	mohor	7641d 09h	/ethmac/tags/rel_27/rtl/
283	RxBDAddress was updated also when value to r_TxBDNum was written with greater value than allowed.	mohor	7669d 03h	/ethmac/tags/rel_27/rtl/
280	Reset has priority in some flipflops.	mohor	7747d 05h	/ethmac/tags/rel_27/rtl/
278	A new bug (entered with previous update) fixed. When abort occured sometimes data transmission was blocked.	mohor	7747d 06h	/ethmac/tags/rel_27/rtl/
277	When padding was enabled and crc disabled, frame was not ended correctly.	mohor	7747d 06h	/ethmac/tags/rel_27/rtl/
276	Defer indication changed.	tadejm	7747d 06h	/ethmac/tags/rel_27/rtl/
275	Fix MTxErr or prevent sending too big frames.	mohor	7754d 10h	/ethmac/tags/rel_27/rtl/
272	When control packets were received, they were ignored in some cases.	tadejm	7755d 06h	/ethmac/tags/rel_27/rtl/
270	When receiving normal data frame and RxFlow control was switched on, RXB interrupt was not set.	mohor	7756d 07h	/ethmac/tags/rel_27/rtl/
269	When in full duplex, transmit was sometimes blocked. Fixed.	mohor	7757d 07h	/ethmac/tags/rel_27/rtl/
264	Registers RxStatusWrite_rck and RxStatusWriteLatched were not used anywhere. Removed.	mohor	7816d 06h	/ethmac/tags/rel_27/rtl/
261	Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort synchronized.	mohor	7816d 17h	/ethmac/tags/rel_27/rtl/
259	In loopback rx_clk is not looped back. Possible CRC error. Consider if usage of additional logic is necessery (FIFO for looping the data).	mohor	7817d 19h	/ethmac/tags/rel_27/rtl/
257	When TxUsedData and CtrlMux occur at the same time, byte counter needs to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.	mohor	7817d 19h	/ethmac/tags/rel_27/rtl/
256	TxDone and TxAbort changed so they're not propagated to the wishbone module when control frame is transmitted.	mohor	7817d 19h	/ethmac/tags/rel_27/rtl/
255	TPauseRq synchronized to tx_clk.	mohor	7817d 19h	/ethmac/tags/rel_27/rtl/
253	r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead.	mohor	7819d 01h	/ethmac/tags/rel_27/rtl/
251	When control frame (PAUSE) was sent, status was written in the eth_wishbone module and both TXB and TXC interrupts were set. Fixed. Only TXC interrupt is set.	mohor	7819d 02h	/ethmac/tags/rel_27/rtl/
250	AddressMiss status is connecting to the Rx BD. AddressMiss is identifying that a frame was received because of the promiscous mode.	mohor	7819d 02h	/ethmac/tags/rel_27/rtl/

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[/] [ethmac/] [tags/] [rel_27/] [rtl/] - Rev 320

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