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[/] [ethmac/] [tags/] [rel_3/] - Rev 113

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Rev Log message Author Age Path
113 RxPointer bug fixed. mohor 7950d 20h /ethmac/tags/rel_3
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7951d 10h /ethmac/tags/rel_3
111 Master state machine had a bug when switching from master write to
master read.		 mohor 7951d 23h /ethmac/tags/rel_3
110 m_wb_cyc_o signal released after every single transfer. mohor 7952d 02h /ethmac/tags/rel_3
109 Comment removed. mohor 7952d 03h /ethmac/tags/rel_3
108 Testbench supports unaligned accesses. mohor 8019d 13h /ethmac/tags/rel_3
107 TX_BUF_BASE changed. mohor 8019d 13h /ethmac/tags/rel_3
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8019d 13h /ethmac/tags/rel_3
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8028d 14h /ethmac/tags/rel_3
104 FCS should not be included in NibbleMinFl. mohor 8030d 08h /ethmac/tags/rel_3
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8030d 09h /ethmac/tags/rel_3
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8030d 09h /ethmac/tags/rel_3
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8030d 09h /ethmac/tags/rel_3
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8030d 09h /ethmac/tags/rel_3
99 Document revised. mohor 8037d 08h /ethmac/tags/rel_3
98 Document revised. mohor 8037d 08h /ethmac/tags/rel_3
97 Small typo fixed. lampret 8054d 07h /ethmac/tags/rel_3
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8058d 07h /ethmac/tags/rel_3
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8058d 09h /ethmac/tags/rel_3
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.		 mohor 8058d 09h /ethmac/tags/rel_3

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