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[/] [ethmac/] [tags/] [rel_3] - Rev 126

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Rev Log message Author Age Path
126 InvalidSymbol generation changed. mohor 7937d 17h /ethmac/tags/rel_3
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.		 mohor 7937d 17h /ethmac/tags/rel_3
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 7937d 18h /ethmac/tags/rel_3
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7939d 18h /ethmac/tags/rel_3
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7939d 18h /ethmac/tags/rel_3
120 Unused files removed. mohor 7939d 19h /ethmac/tags/rel_3
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 7939d 19h /ethmac/tags/rel_3
118 ShiftEnded synchronization changed. mohor 7943d 10h /ethmac/tags/rel_3
117 Clock mrx_clk set to 2.5 MHz. mohor 7943d 21h /ethmac/tags/rel_3
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 7943d 21h /ethmac/tags/rel_3
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 7944d 19h /ethmac/tags/rel_3
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7945d 16h /ethmac/tags/rel_3
113 RxPointer bug fixed. mohor 7952d 08h /ethmac/tags/rel_3
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7952d 22h /ethmac/tags/rel_3
111 Master state machine had a bug when switching from master write to
master read.		 mohor 7953d 11h /ethmac/tags/rel_3
110 m_wb_cyc_o signal released after every single transfer. mohor 7953d 14h /ethmac/tags/rel_3
109 Comment removed. mohor 7953d 15h /ethmac/tags/rel_3
108 Testbench supports unaligned accesses. mohor 8021d 00h /ethmac/tags/rel_3
107 TX_BUF_BASE changed. mohor 8021d 00h /ethmac/tags/rel_3
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8021d 01h /ethmac/tags/rel_3

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