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[/] [ethmac/] [tags/] [rel_7/] [rtl/] [verilog/] [eth_fifo.v] - Rev 40

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40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.
mohor 7670d 16h /ethmac/tags/rel_7/rtl/verilog/eth_fifo.v

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