OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_7/] [rtl/] [verilog/] [eth_spram_256x32.v] - Rev 338

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 root 5440d 23h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
335 New directory structure. root 5498d 04h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7831d 21h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
227 Changed BIST scan signals. tadejm 7831d 21h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
210 BIST added. mohor 7839d 22h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7856d 20h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7918d 22h /ethmac/tags/rel_7/rtl/verilog/eth_spram_256x32.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.