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Rev Log message Author Age Path
214 Signals for WISHBONE B3 compliant interface added. mohor 8093d 19h /ethmac/tags/rel_8/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 8093d 19h /ethmac/tags/rel_8/
212 Minor $display change. mohor 8093d 19h /ethmac/tags/rel_8/
211 Bist added. mohor 8093d 19h /ethmac/tags/rel_8/
210 BIST added. mohor 8093d 19h /ethmac/tags/rel_8/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 8094d 22h /ethmac/tags/rel_8/
208 Virtual Silicon RAMs moved to lib directory tadej 8110d 16h /ethmac/tags/rel_8/
207 Virtual Silicon RAM support fixed tadej 8110d 16h /ethmac/tags/rel_8/
206 Virtual Silicon RAM added to the simulation. mohor 8110d 16h /ethmac/tags/rel_8/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 8110d 17h /ethmac/tags/rel_8/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 8110d 17h /ethmac/tags/rel_8/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 8110d 17h /ethmac/tags/rel_8/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 8113d 18h /ethmac/tags/rel_8/
201 Core size added to the document. mohor 8113d 19h /ethmac/tags/rel_8/
200 File with lower case checked in instead. mohor 8113d 19h /ethmac/tags/rel_8/
199 Datasheet name changed to lower case name. mohor 8113d 19h /ethmac/tags/rel_8/
198 Removed file. File with name in lower case will be added instead. mohor 8113d 19h /ethmac/tags/rel_8/
197 Ethernet Data Sheet. mohor 8113d 19h /ethmac/tags/rel_8/
196 Ethernet product brief. mohor 8113d 20h /ethmac/tags/rel_8/
195 Product brief removed because it is the same as Datasheet. mohor 8113d 20h /ethmac/tags/rel_8/

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