OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_9/] - Rev 358

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 root 5463d 09h /ethmac/tags/rel_9/
335 New directory structure. root 5520d 15h /ethmac/tags/rel_9/
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7842d 12h /ethmac/tags/rel_9/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7842d 12h /ethmac/tags/rel_9/
235 rev 4. mohor 7843d 02h /ethmac/tags/rel_9/
234 Figure list assed to the revision 3. mohor 7843d 10h /ethmac/tags/rel_9/
233 Revision 0.3 released. Some figures added. mohor 7843d 11h /ethmac/tags/rel_9/
232 fpga define added. mohor 7848d 06h /ethmac/tags/rel_9/
231 Description of Core Modules added (figure). mohor 7850d 07h /ethmac/tags/rel_9/
229 case changed to casex. mohor 7854d 04h /ethmac/tags/rel_9/
227 Changed BIST scan signals. tadejm 7854d 07h /ethmac/tags/rel_9/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7854d 09h /ethmac/tags/rel_9/
225 Some minor changes. tadejm 7854d 09h /ethmac/tags/rel_9/
224 Signals for a wave window in Modelsim. tadejm 7854d 10h /ethmac/tags/rel_9/
223 Some code changed due to bug fixes. tadejm 7854d 11h /ethmac/tags/rel_9/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7858d 08h /ethmac/tags/rel_9/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7861d 09h /ethmac/tags/rel_9/
218 Typo error fixed. (When using Bist) mohor 7861d 11h /ethmac/tags/rel_9/
217 Bist supported. mohor 7861d 11h /ethmac/tags/rel_9/
216 Bist signals added. mohor 7861d 11h /ethmac/tags/rel_9/
215 Bist supported. mohor 7861d 12h /ethmac/tags/rel_9/
214 Signals for WISHBONE B3 compliant interface added. mohor 7862d 08h /ethmac/tags/rel_9/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7862d 08h /ethmac/tags/rel_9/
212 Minor $display change. mohor 7862d 08h /ethmac/tags/rel_9/
211 Bist added. mohor 7862d 08h /ethmac/tags/rel_9/
210 BIST added. mohor 7862d 08h /ethmac/tags/rel_9/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7863d 11h /ethmac/tags/rel_9/
208 Virtual Silicon RAMs moved to lib directory tadej 7879d 05h /ethmac/tags/rel_9/
207 Virtual Silicon RAM support fixed tadej 7879d 05h /ethmac/tags/rel_9/
206 Virtual Silicon RAM added to the simulation. mohor 7879d 05h /ethmac/tags/rel_9/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.