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[/] [ethmac/] [tags/] [rel_9/] [rtl/] - Rev 168

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Rev Log message Author Age Path
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7323d 01h /ethmac/tags/rel_9/rtl/
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7324d 02h /ethmac/tags/rel_9/rtl/
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7325d 02h /ethmac/tags/rel_9/rtl/
165 HASH improvement needed. mohor 7325d 05h /ethmac/tags/rel_9/rtl/
164 Ethernet debug registers removed. mohor 7325d 05h /ethmac/tags/rel_9/rtl/
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 7326d 03h /ethmac/tags/rel_9/rtl/
160 error acknowledge cycle termination added to display. mohor 7326d 03h /ethmac/tags/rel_9/rtl/
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.
mohor 7326d 23h /ethmac/tags/rel_9/rtl/
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.
mohor 7330d 21h /ethmac/tags/rel_9/rtl/
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.
mohor 7330d 21h /ethmac/tags/rel_9/rtl/
148 Bug when last byte of destination address was not checked fixed. mohor 7330d 21h /ethmac/tags/rel_9/rtl/
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.
mohor 7330d 21h /ethmac/tags/rel_9/rtl/
146 CarrierSenseLost status is not set when working in loopback mode. mohor 7330d 21h /ethmac/tags/rel_9/rtl/
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 7330d 21h /ethmac/tags/rel_9/rtl/
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
mohor 7347d 00h /ethmac/tags/rel_9/rtl/
141 Syntax error fixed. mohor 7349d 17h /ethmac/tags/rel_9/rtl/
140 Syntax error fixed. mohor 7349d 18h /ethmac/tags/rel_9/rtl/
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.
mohor 7349d 18h /ethmac/tags/rel_9/rtl/
138 Synchronous reset added. mohor 7349d 18h /ethmac/tags/rel_9/rtl/
137 Defines for register width added. mii_rst signal in MIIMODER register
changed.
mohor 7349d 18h /ethmac/tags/rel_9/rtl/
136 Parameter ResetValue changed to capital letters. mohor 7350d 03h /ethmac/tags/rel_9/rtl/
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.
mohor 7351d 20h /ethmac/tags/rel_9/rtl/
133 - Busy signal was not set on time when scan status operation was performed
and clock was divided with more than 2.
- Nvalid remains valid two more clocks (was previously cleared too soon).
mohor 7351d 21h /ethmac/tags/rel_9/rtl/
132 LinkFailRegister is reflecting the status of the PHY's link fail status bit. mohor 7351d 21h /ethmac/tags/rel_9/rtl/
131 LinkFail signal was not latching appropriate bit. mohor 7351d 22h /ethmac/tags/rel_9/rtl/
129 Traffic cop with 2 wishbone master interfaces and 2 wishbona slave
interfaces:
- Host connects to the master interface
- Ethernet master (DMA) connects to the second master interface
- Memory interface connects to the slave interface
- Ethernet slave interface (access to registers and BDs) connects to second
slave interface
mohor 7351d 23h /ethmac/tags/rel_9/rtl/
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.
mohor 7371d 21h /ethmac/tags/rel_9/rtl/
126 InvalidSymbol generation changed. mohor 7371d 22h /ethmac/tags/rel_9/rtl/
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.
mohor 7371d 22h /ethmac/tags/rel_9/rtl/
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7373d 23h /ethmac/tags/rel_9/rtl/

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