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[/] [ethmac/] [trunk/] - Rev 341

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Rev Log message Author Age Path
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4674d 19h /ethmac/trunk/
340 Don't fail if log dir already exists olof 4675d 16h /ethmac/trunk/
339 Added basic support for Icarus Verilog olof 4676d 16h /ethmac/trunk/
338 root 5468d 21h /ethmac/trunk/
335 New directory structure. root 5526d 03h /ethernet/trunk/
334 Minor fixes for Icarus simulator. igorm 6974d 05h /trunk/
333 Some small fixes + some troubles fixed. igorm 6974d 16h /trunk/
332 Case statement improved for synthesys. igorm 6987d 22h /trunk/
331 Tests for delayed CRC and defer indication added. igorm 7003d 00h /trunk/
330 Warning fixes. igorm 7003d 00h /trunk/
329 Defer indication fixed. igorm 7003d 01h /trunk/
328 Delayed CRC fixed. igorm 7003d 01h /trunk/
327 Defer indication fixed. igorm 7003d 01h /trunk/
326 Delayed CRC fixed. igorm 7003d 02h /trunk/
325 Defer indication fixed. igorm 7003d 02h /trunk/
323 Accidently deleted line put back. igorm 7300d 02h /trunk/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries		 igorm 7303d 21h /trunk/
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 7304d 01h /trunk/
319 Latest Ethernet IP core testbench. tadejm 7334d 20h /trunk/
318 Latest Ethernet IP core testbench. tadejm 7334d 21h /trunk/

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