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Rev Log message Author Age Path
347 Added information about running with Icarus Verilog olof 3111d 12h /ethmac/trunk/
346 Updated project location olof 3111d 14h /ethmac/trunk/
345 Temporarily disable failing tests olof 3111d 15h /ethmac/trunk/
344 bit 9 in phy control register is self clearing olof 3117d 17h /ethmac/trunk/
343 Address miss should not be asserted on short frames olof 3121d 13h /ethmac/trunk/
342 Added cast to avoid inequality when comparing different data types olof 3121d 13h /ethmac/trunk/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 3121d 14h /ethmac/trunk/
340 Don't fail if log dir already exists olof 3122d 11h /ethmac/trunk/
339 Added basic support for Icarus Verilog olof 3123d 10h /ethmac/trunk/
338 root 3915d 16h /ethmac/trunk/
335 New directory structure. root 3972d 21h /ethernet/trunk/
334 Minor fixes for Icarus simulator. igorm 5420d 23h /trunk/
333 Some small fixes + some troubles fixed. igorm 5421d 11h /trunk/
332 Case statement improved for synthesys. igorm 5434d 17h /trunk/
331 Tests for delayed CRC and defer indication added. igorm 5449d 18h /trunk/
330 Warning fixes. igorm 5449d 19h /trunk/
329 Defer indication fixed. igorm 5449d 20h /trunk/
328 Delayed CRC fixed. igorm 5449d 20h /trunk/
327 Defer indication fixed. igorm 5449d 20h /trunk/
326 Delayed CRC fixed. igorm 5449d 20h /trunk/

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