OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [bench/] [verilog/] - Rev 302

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
302 mbist signals updated according to newest convention markom 7667d 08h /ethmac/trunk/bench/verilog/
299 Artisan RAMs added. mohor 7725d 04h /ethmac/trunk/bench/verilog/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 7793d 04h /ethmac/trunk/bench/verilog/
281 Tests test_mac_full_duplex_receive 4-7 fixed to proper BD. mohor 7926d 00h /ethmac/trunk/bench/verilog/
279 Underrun test fixed. Many other tests fixed. mohor 7927d 02h /ethmac/trunk/bench/verilog/
274 Backup version. Not fully working. tadejm 7934d 20h /ethmac/trunk/bench/verilog/
267 Full duplex control frames tested. mohor 7991d 00h /ethmac/trunk/bench/verilog/
266 Flow control test almost finished. mohor 7995d 22h /ethmac/trunk/bench/verilog/
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.
mohor 7996d 14h /ethmac/trunk/bench/verilog/
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.
mohor 7997d 02h /ethmac/trunk/bench/verilog/
254 Temp version. mohor 7998d 19h /ethmac/trunk/bench/verilog/
252 Just some updates. tadejm 7998d 22h /ethmac/trunk/bench/verilog/
243 Late collision is not reported any more. tadejm 8004d 03h /ethmac/trunk/bench/verilog/
227 Changed BIST scan signals. tadejm 8030d 23h /ethmac/trunk/bench/verilog/
223 Some code changed due to bug fixes. tadejm 8031d 02h /ethmac/trunk/bench/verilog/
216 Bist signals added. mohor 8038d 02h /ethmac/trunk/bench/verilog/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 8040d 03h /ethmac/trunk/bench/verilog/
194 Full duplex tests modified and testbench bug repaired. tadej 8059d 01h /ethmac/trunk/bench/verilog/
192 Some additional reports added tadej 8060d 22h /ethmac/trunk/bench/verilog/
191 Bug repaired in eth_phy device tadej 8060d 22h /ethmac/trunk/bench/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.