URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] - Rev 306

Rev	Log message	Author	Age	Path
259	In loopback rx_clk is not looped back. Possible CRC error. Consider if usage of additional logic is necessery (FIFO for looping the data).	mohor	7817d 14h	/ethmac/trunk/rtl/
257	When TxUsedData and CtrlMux occur at the same time, byte counter needs to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.	mohor	7817d 14h	/ethmac/trunk/rtl/
256	TxDone and TxAbort changed so they're not propagated to the wishbone module when control frame is transmitted.	mohor	7817d 14h	/ethmac/trunk/rtl/
255	TPauseRq synchronized to tx_clk.	mohor	7817d 14h	/ethmac/trunk/rtl/
253	r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead.	mohor	7818d 20h	/ethmac/trunk/rtl/
251	When control frame (PAUSE) was sent, status was written in the eth_wishbone module and both TXB and TXC interrupts were set. Fixed. Only TXC interrupt is set.	mohor	7818d 20h	/ethmac/trunk/rtl/
250	AddressMiss status is connecting to the Rx BD. AddressMiss is identifying that a frame was received because of the promiscous mode.	mohor	7818d 21h	/ethmac/trunk/rtl/
248	wb_rst_i is used for MIIM reset.	mohor	7819d 21h	/ethmac/trunk/rtl/
246	Since r_Rst bit is not used any more, default value is changed to 0xa000.	mohor	7823d 00h	/ethmac/trunk/rtl/
244	r_Rst signal does not reset any module any more and is removed from the design.	mohor	7823d 19h	/ethmac/trunk/rtl/