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Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] - Rev 359

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Rev	Log message	Author	Age	Path
359	Verilator linting fixes	olof	4645d 07h	/ethmac/trunk/rtl/
358	Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version	olof	4646d 21h	/ethmac/trunk/rtl/
357	Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC	olof	4646d 21h	/ethmac/trunk/rtl/
356	Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure	olof	4646d 23h	/ethmac/trunk/rtl/
355	Import Julius Baxter's verilator hints from ORPSoC	olof	4647d 00h	/ethmac/trunk/rtl/
354	Whitespace cleanup	olof	4647d 00h	/ethmac/trunk/rtl/
353	Inherit fixes for bit width of constants from ORPSoC	olof	4649d 02h	/ethmac/trunk/rtl/
352	Removed delayed assignments from rtl code	olof	4653d 08h	/ethmac/trunk/rtl/
351	Turn defines into parameters in eth_cop	olof	4661d 22h	/ethmac/trunk/rtl/
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4661d 22h	/ethmac/trunk/rtl/
349	Make all parameters configurable from top level	olof	4662d 23h	/ethmac/trunk/rtl/
346	Updated project location	olof	4664d 00h	/ethmac/trunk/rtl/
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4674d 00h	/ethmac/trunk/rtl/
338		root	5468d 03h	/ethmac/trunk/rtl/
335	New directory structure.	root	5525d 08h	/ethmac/trunk/rtl/
333	Some small fixes + some troubles fixed.	igorm	6973d 22h	/ethmac/trunk/rtl/
332	Case statement improved for synthesys.	igorm	6987d 03h	/ethmac/trunk/rtl/
330	Warning fixes.	igorm	7002d 05h	/ethmac/trunk/rtl/
329	Defer indication fixed.	igorm	7002d 07h	/ethmac/trunk/rtl/
328	Delayed CRC fixed.	igorm	7002d 07h	/ethmac/trunk/rtl/
327	Defer indication fixed.	igorm	7002d 07h	/ethmac/trunk/rtl/
326	Delayed CRC fixed.	igorm	7002d 07h	/ethmac/trunk/rtl/
325	Defer indication fixed.	igorm	7002d 07h	/ethmac/trunk/rtl/
323	Accidently deleted line put back.	igorm	7299d 08h	/ethmac/trunk/rtl/
321	- Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the previous update of the core. - TxBDAddress is set to 0 after the TX is enabled in the MODER register. - RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER register. (thanks to Mathias and Torbjorn) - Multicast reception was fixed. Thanks to Ulrich Gries	igorm	7303d 03h	/ethmac/trunk/rtl/
320	TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.	igorm	7303d 06h	/ethmac/trunk/rtl/
317	Multicast detection fixed. Only the LSB of the first byte is checked.	igorm	7343d 09h	/ethmac/trunk/rtl/
312	Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16.	tadejm	7446d 05h	/ethmac/trunk/rtl/
306	Lapsus fixed (!we -> ~we).	simons	7447d 03h	/ethmac/trunk/rtl/
304	WISHBONE slave changed and tested from only 32-bit accesss to byte access.	tadejm	7469d 00h	/ethmac/trunk/rtl/

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Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] - Rev 359

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