OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 355

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
355 Import Julius Baxter's verilator hints from ORPSoC olof 4641d 21h /ethmac/trunk/rtl/verilog/
354 Whitespace cleanup olof 4641d 21h /ethmac/trunk/rtl/verilog/
353 Inherit fixes for bit width of constants from ORPSoC olof 4643d 23h /ethmac/trunk/rtl/verilog/
352 Removed delayed assignments from rtl code olof 4648d 05h /ethmac/trunk/rtl/verilog/
351 Turn defines into parameters in eth_cop olof 4656d 18h /ethmac/trunk/rtl/verilog/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4656d 19h /ethmac/trunk/rtl/verilog/
349 Make all parameters configurable from top level olof 4657d 20h /ethmac/trunk/rtl/verilog/
346 Updated project location olof 4658d 21h /ethmac/trunk/rtl/verilog/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4668d 21h /ethmac/trunk/rtl/verilog/
338 root 5463d 00h /ethmac/trunk/rtl/verilog/
335 New directory structure. root 5520d 05h /ethmac/trunk/rtl/verilog/
333 Some small fixes + some troubles fixed. igorm 6968d 19h /ethmac/trunk/rtl/verilog/
332 Case statement improved for synthesys. igorm 6982d 00h /ethmac/trunk/rtl/verilog/
330 Warning fixes. igorm 6997d 02h /ethmac/trunk/rtl/verilog/
329 Defer indication fixed. igorm 6997d 03h /ethmac/trunk/rtl/verilog/
328 Delayed CRC fixed. igorm 6997d 04h /ethmac/trunk/rtl/verilog/
327 Defer indication fixed. igorm 6997d 04h /ethmac/trunk/rtl/verilog/
326 Delayed CRC fixed. igorm 6997d 04h /ethmac/trunk/rtl/verilog/
325 Defer indication fixed. igorm 6997d 04h /ethmac/trunk/rtl/verilog/
323 Accidently deleted line put back. igorm 7294d 05h /ethmac/trunk/rtl/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.