OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_registers.v] - Rev 354

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8031d 10h /ethmac/trunk/rtl/verilog/eth_registers.v
74 Reset values are passed to registers through parameters mohor 8086d 08h /ethmac/trunk/rtl/verilog/eth_registers.v
69 Define missmatch fixed. mohor 8095d 10h /ethmac/trunk/rtl/verilog/eth_registers.v
68 Registered trimmed. Unused registers removed. mohor 8096d 10h /ethmac/trunk/rtl/verilog/eth_registers.v
56 File format fixed a bit. mohor 8097d 13h /ethmac/trunk/rtl/verilog/eth_registers.v
52 Modified for Address Checking,
addition of eth_addrcheck.v
billditt 8098d 04h /ethmac/trunk/rtl/verilog/eth_registers.v
46 HASH0 and HASH1 registers added. mohor 8100d 07h /ethmac/trunk/rtl/verilog/eth_registers.v
37 Link in the header changed. mohor 8120d 13h /ethmac/trunk/rtl/verilog/eth_registers.v
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).
mohor 8169d 09h /ethmac/trunk/rtl/verilog/eth_registers.v
32 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8169d 13h /ethmac/trunk/rtl/verilog/eth_registers.v

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.