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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_registers.v] - Rev 357

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Rev Log message Author Age Path
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.
mohor 7895d 14h /ethmac/trunk/rtl/verilog/eth_registers.v
132 LinkFailRegister is reflecting the status of the PHY's link fail status bit. mohor 7897d 18h /ethmac/trunk/rtl/verilog/eth_registers.v
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8011d 22h /ethmac/trunk/rtl/verilog/eth_registers.v
74 Reset values are passed to registers through parameters mohor 8066d 20h /ethmac/trunk/rtl/verilog/eth_registers.v
69 Define missmatch fixed. mohor 8075d 23h /ethmac/trunk/rtl/verilog/eth_registers.v
68 Registered trimmed. Unused registers removed. mohor 8076d 22h /ethmac/trunk/rtl/verilog/eth_registers.v
56 File format fixed a bit. mohor 8078d 01h /ethmac/trunk/rtl/verilog/eth_registers.v
52 Modified for Address Checking,
addition of eth_addrcheck.v
billditt 8078d 16h /ethmac/trunk/rtl/verilog/eth_registers.v
46 HASH0 and HASH1 registers added. mohor 8080d 19h /ethmac/trunk/rtl/verilog/eth_registers.v
37 Link in the header changed. mohor 8101d 02h /ethmac/trunk/rtl/verilog/eth_registers.v

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