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URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [modelsim_sim/] - Rev 364

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Rev Log message Author Age Path
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4635d 06h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4640d 07h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
338 root 5461d 11h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
335 New directory structure. root 5518d 16h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
225 Some minor changes. tadejm 7852d 11h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
224 Signals for a wave window in Modelsim. tadejm 7852d 12h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
217 Bist supported. mohor 7859d 13h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
215 Bist supported. mohor 7859d 14h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7877d 08h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
187 _info file added. mohor 7883d 07h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
186 Macro for testbench (DO file). mohor 7883d 07h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
185 Directory keeper. mohor 7883d 08h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
184 Modelsim simulation environment should be ready now. mohor 7883d 08h /ethmac/trunk/sim/rtl_sim/modelsim_sim/
183 Modelsim environment added. mohor 7883d 08h /ethmac/trunk/sim/rtl_sim/modelsim_sim/

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