OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [ncsim_sim/] [run/] [run_eth_sim_regr.scr] - Rev 364

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 root 5467d 20h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
335 New directory structure. root 5525d 01h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
319 Latest Ethernet IP core testbench. tadejm 7333d 19h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
311 Update script for running different file list files for different RAM models. tadejm 7445d 22h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
295 Few minor changes. tadejm 7559d 21h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
290 Additional checking for FAILED tests added - for ATS. tadejm 7585d 21h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
175 Script fixed to new dir structure mohor 7893d 22h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
172 NCSIM simulation environment added to cvs mohor 7893d 22h /ethmac/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.