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[/] [ethmac/] [trunk] - Rev 341

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Rev Log message Author Age Path
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 5006d 16h /ethmac/trunk
340 Don't fail if log dir already exists olof 5007d 13h /ethmac/trunk
339 Added basic support for Icarus Verilog olof 5008d 12h /ethmac/trunk
338 root 5800d 18h /ethmac/trunk
335 New directory structure. root 5857d 23h /ethernet/trunk
334 Minor fixes for Icarus simulator. igorm 7306d 01h /trunk
333 Some small fixes + some troubles fixed. igorm 7306d 13h /trunk
332 Case statement improved for synthesys. igorm 7319d 19h /trunk
331 Tests for delayed CRC and defer indication added. igorm 7334d 20h /trunk
330 Warning fixes. igorm 7334d 21h /trunk
329 Defer indication fixed. igorm 7334d 22h /trunk
328 Delayed CRC fixed. igorm 7334d 22h /trunk
327 Defer indication fixed. igorm 7334d 22h /trunk
326 Delayed CRC fixed. igorm 7334d 22h /trunk
325 Defer indication fixed. igorm 7334d 23h /trunk
323 Accidently deleted line put back. igorm 7631d 23h /trunk
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 7635d 18h /trunk
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 7635d 22h /trunk
319 Latest Ethernet IP core testbench. tadejm 7666d 17h /trunk
318 Latest Ethernet IP core testbench. tadejm 7666d 17h /trunk
317 Multicast detection fixed. Only the LSB of the first byte is checked. igorm 7676d 00h /trunk
315 Updated testbench. Some more testcases, some repaired. tadejm 7778d 21h /trunk
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 7778d 21h /trunk
311 Update script for running different file list files for different RAM models. tadejm 7778d 21h /trunk
310 More signals. tadejm 7778d 21h /trunk
309 Update file list files for different RAM models with byte select accessing. tadejm 7778d 21h /trunk
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 7778d 21h /trunk
306 Lapsus fixed (!we -> ~we). simons 7779d 18h /trunk
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7801d 15h /trunk
302 mbist signals updated according to newest convention markom 7828d 02h /trunk

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