URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac] - Rev 368

Rev	Log message	Author	Age	Path
368	dbg_dat0 only exist when `DEBUG_WISHBONE is set	olof	4453d 14h	/ethmac
367	Remove Wishbone B3 define. For classic wishbone, these ports can just be ignored	olof	4516d 11h	/ethmac
366	Readded eth_top.v with a deprecation warning	olof	4640d 15h	/ethmac
365	Whitespace cleanup	olof	4641d 14h	/ethmac
364	Renamed eth_top.v to ethmac.v to fit better into OpenCores structure	olof	4642d 12h	/ethmac
363	quartus project files	unneback	4642d 21h	/ethmac
362	added Makefiles to build project	unneback	4642d 21h	/ethmac
361	created branch unneback	unneback	4642d 21h	/ethmac
360	Added partial implementation of the debug register from ORPSoC	olof	4643d 20h	/ethmac
359	Verilator linting fixes	olof	4645d 22h	/ethmac
358	Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version	olof	4647d 12h	/ethmac
357	Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC	olof	4647d 12h	/ethmac
356	Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure	olof	4647d 14h	/ethmac
355	Import Julius Baxter's verilator hints from ORPSoC	olof	4647d 15h	/ethmac
354	Whitespace cleanup	olof	4647d 15h	/ethmac
353	Inherit fixes for bit width of constants from ORPSoC	olof	4649d 16h	/ethmac
352	Removed delayed assignments from rtl code	olof	4653d 22h	/ethmac
351	Turn defines into parameters in eth_cop	olof	4662d 12h	/ethmac
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4662d 13h	/ethmac
349	Make all parameters configurable from top level	olof	4663d 13h	/ethmac