URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 236

Rev	Log message	Author	Age	Path
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	7847d 16h	/
235	rev 4.	mohor	7848d 07h	/
234	Figure list assed to the revision 3.	mohor	7848d 15h	/
233	Revision 0.3 released. Some figures added.	mohor	7848d 15h	/
232	fpga define added.	mohor	7853d 10h	/
231	Description of Core Modules added (figure).	mohor	7855d 11h	/
230	This commit was manufactured by cvs2svn to create tag 'rel_8'.		7859d 08h	/
229	case changed to casex.	mohor	7859d 08h	/
228	This commit was manufactured by cvs2svn to create tag 'rel_7'.		7859d 12h	/
227	Changed BIST scan signals.	tadejm	7859d 12h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7859d 13h	/
225	Some minor changes.	tadejm	7859d 13h	/
224	Signals for a wave window in Modelsim.	tadejm	7859d 15h	/
223	Some code changed due to bug fixes.	tadejm	7859d 15h	/
222	This commit was manufactured by cvs2svn to create tag 'rel_6'.		7863d 13h	/
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	7863d 13h	/
220	This commit was manufactured by cvs2svn to create tag 'rel_5'.		7866d 13h	/
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	7866d 13h	/
218	Typo error fixed. (When using Bist)	mohor	7866d 15h	/
217	Bist supported.	mohor	7866d 15h	/