OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 236

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7821d 02h /
235 rev 4. mohor 7821d 17h /
234 Figure list assed to the revision 3. mohor 7822d 01h /
233 Revision 0.3 released. Some figures added. mohor 7822d 01h /
232 fpga define added. mohor 7826d 20h /
231 Description of Core Modules added (figure). mohor 7828d 22h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7832d 18h /
229 case changed to casex. mohor 7832d 18h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7832d 22h /
227 Changed BIST scan signals. tadejm 7832d 22h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7833d 00h /
225 Some minor changes. tadejm 7833d 00h /
224 Signals for a wave window in Modelsim. tadejm 7833d 01h /
223 Some code changed due to bug fixes. tadejm 7833d 01h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7836d 23h /
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7836d 23h /
220 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7840d 00h /
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7840d 00h /
218 Typo error fixed. (When using Bist) mohor 7840d 02h /
217 Bist supported. mohor 7840d 02h /
216 Bist signals added. mohor 7840d 02h /
215 Bist supported. mohor 7840d 03h /
214 Signals for WISHBONE B3 compliant interface added. mohor 7840d 22h /
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7840d 23h /
212 Minor $display change. mohor 7840d 23h /
211 Bist added. mohor 7840d 23h /
210 BIST added. mohor 7840d 23h /
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7842d 02h /
208 Virtual Silicon RAMs moved to lib directory tadej 7857d 20h /
207 Virtual Silicon RAM support fixed tadej 7857d 20h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.