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Rev Log message Author Age Path
248 wb_rst_i is used for MIIM reset. mohor 6152d 16h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 6155d 19h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6155d 19h /
245 Rev 1.7. mohor 6156d 13h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6156d 15h /
243 Late collision is not reported any more. tadejm 6156d 20h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6157d 11h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6157d 11h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6157d 11h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6157d 11h /
238 Defines fixed to use generic RAM by default. mohor 6169d 15h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 6171d 21h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6171d 21h /
235 rev 4. mohor 6172d 11h /
234 Figure list assed to the revision 3. mohor 6172d 19h /
233 Revision 0.3 released. Some figures added. mohor 6172d 20h /
232 fpga define added. mohor 6177d 15h /
231 Description of Core Modules added (figure). mohor 6179d 16h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 6183d 13h /
229 case changed to casex. mohor 6183d 13h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 6183d 16h /
227 Changed BIST scan signals. tadejm 6183d 16h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6183d 18h /
225 Some minor changes. tadejm 6183d 18h /
224 Signals for a wave window in Modelsim. tadejm 6183d 19h /
223 Some code changed due to bug fixes. tadejm 6183d 20h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 6187d 17h /
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 6187d 17h /
220 This commit was manufactured by cvs2svn to create tag 'rel_5'. 6190d 18h /
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 6190d 18h /

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