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271 This commit was manufactured by cvs2svn to create tag 'rel_14'. 6056d 14h /
270 When receiving normal data frame and RxFlow control was switched on, RXB
interrupt was not set.
mohor 6056d 14h /
269 When in full duplex, transmit was sometimes blocked. Fixed. mohor 6057d 14h /
268 Release 1.19. Control frame description changed. mohor 6111d 07h /
267 Full duplex control frames tested. mohor 6111d 10h /
266 Flow control test almost finished. mohor 6116d 09h /
265 This commit was manufactured by cvs2svn to create tag 'rel_13'. 6116d 13h /
264 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.
mohor 6116d 13h /
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.
mohor 6117d 00h /
262 Version 1.18 released.
MIIMRST (Reset of the MIIM module) not used any more in the MIIMODER
register. Control Frame bit (CF) added to the RX buffer descriptor. Control
frame detection section updated.
mohor 6117d 00h /
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.
mohor 6117d 00h /
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.
mohor 6117d 12h /
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).
mohor 6118d 01h /
258 This commit was manufactured by cvs2svn to create tag 'rel_12'. 6118d 02h /
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 6118d 02h /
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 6118d 02h /
255 TPauseRq synchronized to tx_clk. mohor 6118d 02h /
254 Temp version. mohor 6119d 06h /
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 6119d 08h /
252 Just some updates. tadejm 6119d 08h /
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 6119d 08h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6119d 08h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 6120d 08h /
248 wb_rst_i is used for MIIM reset. mohor 6120d 08h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 6123d 12h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6123d 12h /
245 Rev 1.7. mohor 6124d 05h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6124d 07h /
243 Late collision is not reported any more. tadejm 6124d 13h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6125d 03h /

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