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Rev Log message Author Age Path
339 Added basic support for Icarus Verilog olof 4165d 16h /
338 root 4957d 21h /
337 root 5013d 23h /
336 Added old uploaded documents to new repository. root 5015d 03h /
335 New directory structure. root 5015d 03h /
334 Minor fixes for Icarus simulator. igorm 6463d 05h /
333 Some small fixes + some troubles fixed. igorm 6463d 17h /
332 Case statement improved for synthesys. igorm 6476d 22h /
331 Tests for delayed CRC and defer indication added. igorm 6492d 00h /
330 Warning fixes. igorm 6492d 00h /
329 Defer indication fixed. igorm 6492d 01h /
328 Delayed CRC fixed. igorm 6492d 01h /
327 Defer indication fixed. igorm 6492d 01h /
326 Delayed CRC fixed. igorm 6492d 02h /
325 Defer indication fixed. igorm 6492d 02h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 6789d 02h /
323 Accidently deleted line put back. igorm 6789d 02h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 6792d 21h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6792d 21h /
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 6793d 01h /

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