OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 346

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
346 Updated project location olof 4657d 23h /
345 Temporarily disable failing tests olof 4658d 00h /
344 bit 9 in phy control register is self clearing olof 4664d 02h /
343 Address miss should not be asserted on short frames olof 4667d 22h /
342 Added cast to avoid inequality when comparing different data types olof 4667d 22h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4667d 22h /
340 Don't fail if log dir already exists olof 4668d 20h /
339 Added basic support for Icarus Verilog olof 4669d 19h /
338 root 5462d 01h /
337 root 5518d 03h /
336 Added old uploaded documents to new repository. root 5519d 06h /
335 New directory structure. root 5519d 06h /
334 Minor fixes for Icarus simulator. igorm 6967d 08h /
333 Some small fixes + some troubles fixed. igorm 6967d 20h /
332 Case statement improved for synthesys. igorm 6981d 01h /
331 Tests for delayed CRC and defer indication added. igorm 6996d 03h /
330 Warning fixes. igorm 6996d 03h /
329 Defer indication fixed. igorm 6996d 05h /
328 Delayed CRC fixed. igorm 6996d 05h /
327 Defer indication fixed. igorm 6996d 05h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.