OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 77

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
77 Interrupts changed mohor 8066d 06h /
76 Interrupts changed in the top file mohor 8066d 06h /
75 r_Bro is used for accepting/denying frames mohor 8066d 06h /
74 Reset values are passed to registers through parameters mohor 8066d 06h /
73 Number of interrupts changed mohor 8066d 06h /
72 Retry is not activated when a Tx Underrun occured mohor 8070d 09h /
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8074d 11h /
70 Small fixes. mohor 8074d 12h /
69 Define missmatch fixed. mohor 8075d 09h /
68 Registered trimmed. Unused registers removed. mohor 8076d 08h /
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8076d 09h /
66 Testbench fixed, code simplified, unused signals removed. mohor 8076d 15h /
65 Testbench fixed, code simplified, unused signals removed. mohor 8076d 15h /
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8077d 05h /
63 RxAbort is connected differently. mohor 8077d 08h /
62 RxAbort is an output. No need to have is declared as wire. mohor 8077d 08h /
61 RxStartFrm cleared when abort or retry comes. mohor 8077d 10h /
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8077d 10h /
59 Changes that were lost when updating from 1.11 to 1.14 fixed. mohor 8077d 11h /
58 File format changed. mohor 8077d 11h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.