URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] - Rev 74

Rev	Log message	Author	Age	Path
74	Added old uploaded documents to new repository.	root	5524d 12h	/
73	Added old uploaded documents to new repository.	root	5525d 04h	/
72	New directory structure.	root	5525d 04h	/
71	Replay xilinx fifo with private fifo	fisher5090	5859d 00h	/
70	no message	fisher5090	6522d 18h	/
69	no message	fisher5090	6522d 18h	/
68	datasheet of management module	fisher5090	6523d 05h	/
67	modify mgmt_miim_rdy timing sequence	fisher5090	6523d 13h	/
66	comments added	fisher5090	6523d 17h	/
65	bad coding style, but works, will be modified later	fisher5090	6523d 20h	/
64	no message	fisher5090	6526d 06h	/
63	remove pad function added, using xilinx vp20 -6 as target FPGA, passes post place and route simulation	fisher5090	6526d 06h	/
62	no message	fisher5090	6526d 13h	/
61	no message	fisher5090	6526d 15h	/
60	change rxd_in, rxc_in and rxclk_in signals'name to xgmii_rxd, xgmii_rxc and xgmii_rxclk	fisher5090	6526d 15h	/
59	first version	fisher5090	6526d 16h	/
58	configuration vector select inband fcs or not	fisher5090	6526d 21h	/
57	both inband fcs and no inband fcs are OK	fisher5090	6526d 21h	/
56	no message	fisher5090	6527d 13h	/
55	testbench for normal frame and error frame	fisher5090	6527d 13h	/