OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog/] - Rev 48

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
28 - allow restart of sqrt calc if load signal activated
-
robfinch 2086d 20h /ft816float/trunk/rtl/verilog/
27 - transmission of Nans in normalizer robfinch 2108d 09h /ft816float/trunk/rtl/verilog/
26 - factor out sizes
- add leading bit for FMA normalization to normalizer
robfinch 2109d 01h /ft816float/trunk/rtl/verilog/
25 - FMA improved accuracy robfinch 2111d 17h /ft816float/trunk/rtl/verilog/
24 - fix infinity robfinch 2111d 22h /ft816float/trunk/rtl/verilog/
23 - better test data for FMA robfinch 2111d 22h /ft816float/trunk/rtl/verilog/
22 - fused multiply add robfinch 2112d 00h /ft816float/trunk/rtl/verilog/
21 - trunc function robfinch 2112d 13h /ft816float/trunk/rtl/verilog/
20 - fix nan propagation robfinch 2113d 19h /ft816float/trunk/rtl/verilog/
19 - latency 10 addsub robfinch 2113d 20h /ft816float/trunk/rtl/verilog/
18 - sigmoid function robfinch 2115d 14h /ft816float/trunk/rtl/verilog/
16 - added reciprocal square root estimate robfinch 2115d 14h /ft816float/trunk/rtl/verilog/
15 - added reciprocal estimate robfinch 2117d 02h /ft816float/trunk/rtl/verilog/
14 - added Goldschmidt divider robfinch 2356d 00h /ft816float/trunk/rtl/verilog/
13 - fix sticky bit position robfinch 2599d 01h /ft816float/trunk/rtl/verilog/
12 - added square root robfinch 2600d 16h /ft816float/trunk/rtl/verilog/
11 - fix multiply NaN robfinch 2602d 15h /ft816float/trunk/rtl/verilog/
10 - fp updated
- test benches and vectors
robfinch 2603d 03h /ft816float/trunk/rtl/verilog/
9 - added sample FP unit robfinch 3026d 03h /ft816float/trunk/rtl/verilog/
8 Updated better support for 80 bit / 128 bit ops robfinch 3026d 03h /ft816float/trunk/rtl/verilog/
7 adding missing reduction or function robfinch 3177d 12h /ft816float/trunk/rtl/verilog/
6 added more fp ops robfinch 3283d 19h /ft816float/trunk/rtl/verilog/
5 added floattoint inttofloat robfinch 3285d 10h /ft816float/trunk/rtl/verilog/
3 FT816Float - initial zrchive robfinch 3756d 20h /ft816float/trunk/rtl/verilog/

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.