URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] - Rev 74

Rev	Log message	Author	Age	Path
50	- added decimal floating-point adder	robfinch	1495d 09h	/ft816float/trunk/rtl/verilog2/
49	- pipelining	robfinch	1515d 13h	/ft816float/trunk/rtl/verilog2/
48	- refactoring to use packages	robfinch	1539d 21h	/ft816float/trunk/rtl/verilog2/
35	- additional pipelining in divider - radix4 primitive	robfinch	1755d 12h	/ft816float/trunk/rtl/verilog2/
34	- add pipeline stage in divider	robfinch	1755d 14h	/ft816float/trunk/rtl/verilog2/
33	- mult114 for FMA	robfinch	2007d 23h	/ft816float/trunk/rtl/verilog2/
32	- FMA, test bench for FMA	robfinch	2007d 23h	/ft816float/trunk/rtl/verilog2/
31	- preserve nan sign in addsub	robfinch	2008d 10h	/ft816float/trunk/rtl/verilog2/
30	- move load signal to bottom	robfinch	2024d 06h	/ft816float/trunk/rtl/verilog2/
29	- refactor with FPWID and EXTRA_BITS - Nan propagation	robfinch	2024d 14h	/ft816float/trunk/rtl/verilog2/