URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 72

Rev	Log message	Author	Age	Path
52	Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit.	rherveille	7290d 22h	/
51	Fixed simulation issue when writing to CR register	rherveille	7344d 23h	/
50	* empty log message *	rherveille	7359d 18h	/
49	Added testbench	rherveille	7359d 18h	/
48	Fixed a bug in the arbitration-lost signal generation. VHDL version only.	rherveille	7361d 02h	/
47	Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command.	rherveille	7369d 22h	/
46	Fixed slave address MSB='1' bug	rherveille	7444d 22h	/
45	Added slave address configurability	rherveille	7444d 22h	/
44	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7530d 01h	/
43	Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'.	rherveille	7530d 01h	/