OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [tags/] [asyst_3/] - Rev 70

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
68 New directory structure. root 4955d 04h /i2c/tags/asyst_3/
42 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 6971d 16h /tags/asyst_3/
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 6971d 16h /trunk/
39 Forgot an 'end if' :-/ rherveille 6991d 11h /trunk/
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.
rherveille 6994d 19h /trunk/
37 Fixed a type in example 1
Changed 'RW' to 'W' in command register description.
Changed 'RW' to 'W' in transmit register description.
rherveille 7031d 11h /trunk/
36 Fixed cmd_ack generation item (no bug). rherveille 7146d 12h /trunk/
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7180d 02h /trunk/
34 Fixed a few 'arbitration lost' bugs. VHDL version only. rherveille 7184d 00h /trunk/
33 Fixed a bug in the Command Register declaration. rherveille 7206d 09h /trunk/
32 Multi-master capabilities added to the core. Changed documentation accordingly.
Updated some timing diagrams.
rherveille 7216d 09h /trunk/
31 Core is now a Multimaster I2C controller. rherveille 7220d 10h /trunk/
30 Small code simplifications rherveille 7220d 10h /trunk/
29 Core is now a Multimaster I2C controller rherveille 7220d 11h /trunk/
28 *** empty log message *** rherveille 7246d 04h /trunk/
27 Cleaned up code rherveille 7246d 04h /trunk/
26 *** empty log message *** rherveille 7249d 12h /trunk/
25 Added timing tests to i2c_model.
Updated testbench.
rherveille 7277d 08h /trunk/
24 Fixed some reported minor start/stop generation timing issuess. rherveille 7277d 08h /trunk/
23 *** empty log message *** rherveille 7404d 13h /trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.