URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [tags/] [rel_1/] [bench/] - Rev 68

Rev	Log message	Author	Age	Path
68	New directory structure.	root	5524d 15h	/i2c/tags/rel_1/bench/
44	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7531d 06h	/i2c/tags/rel_1/bench/
43	Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'.	rherveille	7531d 06h	/i2c/tags/rel_1/bench/
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7846d 20h	/i2c/tags/rel_1/bench/
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8074d 04h	/i2c/tags/rel_1/bench/
10	Created new directory structure. Added Verilog version.	rherveille	8248d 02h	/i2c/tags/rel_1/bench/