URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 12

Rev	Log message	Author	Age	Path
12	no message	rherveille	8223d 19h	/i2c/trunk/
11	Changed RST_LVL define to parameter.	rherveille	8227d 02h	/i2c/trunk/
10	Created new directory structure. Added Verilog version.	rherveille	8248d 23h	/i2c/trunk/
9	Created directory structure (documentation, vhdl, verilog)	rherveille	8318d 18h	/i2c/trunk/
8	Created directory structure (documentation, vhdl, verilog)	rherveille	8318d 18h	/i2c/trunk/
7	added some remarks, fixed some sensitivity lists	rherveille	8387d 21h	/i2c/trunk/
6	fixed typo txt -> txr	rherveille	8392d 00h	/i2c/trunk/
5	fixed an incomplete sensitivity list on assign_dato process	rherveille	8398d 23h	/i2c/trunk/
4	WISHBONE I2C Master Core: initial release	rherveille	8451d 02h	/i2c/trunk/
2	initial release	rherveille	8513d 01h	/i2c/trunk/
1	Standard project directories initialized by cvs2svn.		8513d 01h	/i2c/trunk/