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[/] [i2c/] [trunk/] - Rev 14

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Rev Log message Author Age Path
14 Fixed wb_ack_o generation bug.
Fixed bug in the byte_controller statemachine.
Added headers.
rherveille 8179d 06h /i2c/trunk/
13 Fixed some synthesis warnings. rherveille 8190d 10h /i2c/trunk/
12 no message rherveille 8196d 01h /i2c/trunk/
11 Changed RST_LVL define to parameter. rherveille 8199d 09h /i2c/trunk/
10 Created new directory structure.
Added Verilog version.
rherveille 8221d 05h /i2c/trunk/
9 Created directory structure (documentation, vhdl, verilog) rherveille 8291d 00h /i2c/trunk/
8 Created directory structure (documentation, vhdl, verilog) rherveille 8291d 00h /i2c/trunk/
7 added some remarks, fixed some sensitivity lists rherveille 8360d 03h /i2c/trunk/
6 fixed typo txt -> txr rherveille 8364d 07h /i2c/trunk/
5 fixed an incomplete sensitivity list on assign_dato process rherveille 8371d 05h /i2c/trunk/
4 WISHBONE I2C Master Core: initial release rherveille 8423d 08h /i2c/trunk/
2 initial release rherveille 8485d 08h /i2c/trunk/
1 Standard project directories initialized by cvs2svn. 8485d 08h /i2c/trunk/

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