URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 48

Rev	Log message	Author	Age	Path
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7841d 08h	/i2c/trunk/
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7841d 08h	/i2c/trunk/
23	* empty log message *	rherveille	7968d 14h	/i2c/trunk/
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	7978d 19h	/i2c/trunk/
21	no message	rherveille	8064d 20h	/i2c/trunk/
20	Added Appendix A	rherveille	8064d 20h	/i2c/trunk/
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8068d 16h	/i2c/trunk/
18	no message	rherveille	8095d 12h	/i2c/trunk/
17	C-include file. Initial release	rherveille	8183d 17h	/i2c/trunk/
16	Changed PRER reset value from 0x0000 to 0xffff, conform specs.	rherveille	8195d 16h	/i2c/trunk/