URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 75

Rev	Log message	Author	Age	Path
53	Fixed previous fix :) Made a variable vs signal mistake.	rherveille	7291d 12h	/i2c/trunk/
52	Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit.	rherveille	7291d 13h	/i2c/trunk/
51	Fixed simulation issue when writing to CR register	rherveille	7345d 14h	/i2c/trunk/
50	* empty log message *	rherveille	7360d 08h	/i2c/trunk/
49	Added testbench	rherveille	7360d 08h	/i2c/trunk/
48	Fixed a bug in the arbitration-lost signal generation. VHDL version only.	rherveille	7361d 16h	/i2c/trunk/
47	Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command.	rherveille	7370d 12h	/i2c/trunk/
46	Fixed slave address MSB='1' bug	rherveille	7445d 13h	/i2c/trunk/
45	Added slave address configurability	rherveille	7445d 13h	/i2c/trunk/
43	Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'.	rherveille	7530d 15h	/i2c/trunk/