Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 76


Filtering Options

Clear current filter

Rev Log message Author Age Path
54 Fixed scl, sda delay. rherveille 5918d 21h /i2c/trunk/
53 Fixed previous fix :) Made a variable vs signal mistake. rherveille 6214d 19h /i2c/trunk/
52 Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit. rherveille 6214d 19h /i2c/trunk/
51 Fixed simulation issue when writing to CR register rherveille 6268d 20h /i2c/trunk/
50 *** empty log message *** rherveille 6283d 15h /i2c/trunk/
49 Added testbench rherveille 6283d 15h /i2c/trunk/
48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 6284d 23h /i2c/trunk/
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 6293d 19h /i2c/trunk/
46 Fixed slave address MSB='1' bug rherveille 6368d 19h /i2c/trunk/
45 Added slave address configurability rherveille 6368d 19h /i2c/trunk/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2021, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.