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[/] [light8080/] [trunk/] - Rev 37

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Rev Log message Author Age Path
37 IMSAI monitor demo removed ja_rd 5566d 19h /light8080/trunk/
36 CPM demo on cyclone 2 starter board
(work in progress)
ja_rd 5566d 19h /light8080/trunk/
35 CPM demo pin assignment file (Altera Quartus II) ja_rd 5566d 19h /light8080/trunk/
34 rs232 sanitized and parametrized ja_rd 5566d 19h /light8080/trunk/
31 New directory structure. root 5697d 23h /light8080/trunk/
30 hexconv.pl nmoved to /asm, where it is actually used ja_rd 5718d 04h /trunk/
29 File list updated with new files ja_rd 5718d 04h /trunk/
28 These CP/M assembler output files are no longer used
because CP/M assembler is no longer used
ja_rd 5718d 04h /trunk/
27 Brief instructions for batch script ja_rd 5718d 04h /trunk/
26 Builds test bench from vhdl template and assembly source
relies on TASM to do the assembly
ja_rd 5718d 04h /trunk/
25 Moved from /util
Added comments and generally improved options
ja_rd 5718d 04h /trunk/
24 Totally changed -- tests interrupts using simulated interrupt controller in hdl test bench
Code reformatted for TASM
ja_rd 5718d 04h /trunk/
23 Code reformatted for TASM ja_rd 5718d 04h /trunk/
22 Totally changed -- vhdl code generated from a template
Interrupts tested from software using a simulated interrupt controller
ja_rd 5718d 05h /trunk/
21 Totally changed -- vhdl code generated from a template ja_rd 5718d 05h /trunk/
20 VHDL template for test benches ja_rd 5718d 05h /trunk/
19 Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances)
Added an output to the core to mark the fetch cycle of all instructions
Started to add timing diagrams
ja_rd 5718d 05h /trunk/
18 Uncluttered the signal display a bit ja_rd 5718d 05h /trunk/
17 Comments added ja_rd 5804d 07h /trunk/
16 adding LST filed generated by TASM ja_rd 5804d 08h /trunk/

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