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[/] [mcs-4/] - Rev 7

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Rev Log message Author Age Path
7 i4004: Replace a latch with a flip-flop in instruction_decode

This commit replaces a transparent latch with a clocked flip-flop
in the instruction decoder.		 rrpollack 751d 20h /mcs-4/
6 Massive update of all MCS-4 components

This commit updates all the previous i4004 CPU modules to address
various bugs that were found during testing. At this point, all
CPU functions appear to operate correctly. No FPGA-specific
features are required by the i4004 CPU implementation.

This commit also provides implementations of the 4001 ROM, 4002 RAM,
and 4003 Shift Register chips, thus allowing a functional MCS-4
system to be implemented. Some of these modules are dependent on
features found in the Xilinx Spartan FPGA, such as Block RAM and
dual-port Distributed RAM, though alternate implementations are
possible for other FPGAs.

These modules have been used (along with keyboard and printer emulation
modules not provided here) to implement a complete Busicom 141-PF calculator
clone using a Xilinx Spartan 6 FPGA and a custom PCB. All functions
of the Busicom 141-PF calculator appear to function normally.		 rrpollack 873d 22h /mcs-4/
5 Restructure the project directory hierarchy

This commit restructures the directory hierarchy to extract modules
that will be common to more than one MCS-4 chip, and move the modules
specific to the i4004 CPU to their own subdirectory.		 rrpollack 874d 02h /mcs-4/
4 Miscellaneous bugfixes to the Verilog implementation of the i4004 CPU rrpollack 1448d 22h /mcs-4/
3 CadSoft Eagle 6 Schematic source and PDF for the Intel 4004 CPU

This is a single-page schematic containing the entire Intel 4004 CPU.
It was derived from the schematic bitmap provided in Lagos Kintli's
simulator.

This schematic necessarily carries the same Creative Commons non-
commercial license that applies to the rest of these materials.
See the files doc/License.txt and doc/Intel_IPNC_License.pdf for
additional details.		 rrpollack 4174d 21h /mcs-4/
2 Initial import of core 4004 CPU source rrpollack 4180d 15h /mcs-4/
1 The project and the structure was created root 4230d 01h /mcs-4/

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