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Rev Log message Author Age Path
132 ModelSim simulation, running top_module minsoc_bench_clock now, instead of minsoc_bench. rfajardo 3244d 15h /
131 Renaming testbench modules. Adding to ifdefs without which the testbench generation can fail. rfajardo 3244d 16h /
130 minsoc_bench.v: task test_eth has to be phased out together with the ETHERNET definition. If there is no ETHERNET, test_eth cannot be defined. rfajardo 3244d 18h /
129 Removing bugs introduced when splitting clocks and reset.
1) NEGATIVE_RESET or POSITIVE_RESET were missing as definition on minsoc_bench_clock.v (include minsoc_defines.v).
2) wait for reset on minsoc_bench.v to assert design_ready
rfajardo 3245d 05h /
128 Outsourcing clocks and reset generations from minsoc_bench.v to minsoc_bench_clock.v. rfajardo 3245d 06h /
127 Removing redundant simulation output. rfajardo 3245d 12h /
126 Updating information about simulation time for Ethernet test. rfajardo 3245d 12h /
125 Adjusting testbench messages. Creating tasks for firmware tests. rfajardo 3245d 12h /
124 Removing Verilog delays from minsoc_bench.v. minsoc_bench_defines.v defines now if uart or ethernet have to be tested. If yes, it checks the behavior of the enclosed firmwares. If not, simulation simply runs forever. rfajardo 3245d 14h /
123 Renaming reg final to firmware_size. Final is a keyword for Verilator. rfajardo 3245d 19h /
122 Renaming minsoc-configure.sh to minsoc-setup.sh. rfajardo 3251d 08h /
121 Asserting svn:executable properties of modelsim/*.bat scripts.

Including corrected patch for advanced debug system watchpoints under utils/setup. Configure script updated to use this instead of advanced debug system patches. This will remain so until the patch is corrected. The previous line still has the correct command.
rfajardo 3251d 10h /
120 ethmac.prj: a file was missing rfajardo 3251d 13h /
119 Tricking Subversion to accept bat files that are now executable. rfajardo 3251d 13h /
118 Configure scripts for Xilinx devices updated. All of them require to update or1200_defines.v. The non-standard part uses now the variable $BOARD to print that this board require non-standard update of files. rfajardo 3251d 13h /
117 spartan3e_starter_kit designs require DUALPORT from or1200_defines.v to be active instead of GENERIC. rfajardo 3251d 14h /
116 Configure scripts were trying to copy/patch projects files before creating them. Ordering is correct now. rfajardo 3251d 15h /
115 configure.sh script dir aware.
minsoc-install.sh logging to script dir.
rfajardo 3251d 15h /
114 Installation and Configuration scripts can be run out of any directory.
They assume they are going to process the files and directories found in the directory they are run from.
rfajardo 3251d 16h /
113 minsoc-install.sh & minsoc-configure.sh:
-aware of location of configure.sh script
configure.sh:
-does not block on patch error

spartan3e_starter_kit & spartan3e_starter_kit_eth:
-or1200_defines.v updated

prj:
-src/blackboxes/or1200_top.v adjusted to or1200_rel1
-Makefile had a typo regarding altera vhdl files
rfajardo 3251d 16h /

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