URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] - Rev 122

Rev	Log message	Author	Age	Path
102	GNU GDB FTP has renamed gdb-6.8 package to gdb-6.8a package. Uncompressed it remains gdb-6.8, so no other changes to script are necessary.	rfajardo	4573d 00h	/minsoc/
101	Documentation, wiki's address updated.	rfajardo	4598d 12h	/minsoc/
100	syn/altera/minsoc_top.qsf: I thought this file was being generated now as project file description. But it is merely a synthesis configuration file and must be here. File re-added.	rfajardo	4607d 10h	/minsoc/
99	backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid vendor specific code to flow into the simulation. If you don't do it, generate_bench fails.	rfajardo	4607d 10h	/minsoc/
98	Removing deprecated minsoc_top.qsf file.	rfajardo	4607d 10h	/minsoc/
97	As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board.	rfajardo	4607d 11h	/minsoc/
96	Some files needed for Altera synthesis	javieralso	4607d 21h	/minsoc/
95	Makefile for Altera FPGAs fixed	javieralso	4609d 00h	/minsoc/
94	Fix bug in minsoc_top.prj for Altera synthesis	javieralso	4611d 09h	/minsoc/
93	Support for Altera synthesis. It needs some tune, but it works fine	javieralso	4611d 12h	/minsoc/